1. Field of the Invention
This invention relates to a test signal output circuit for LSI (large scale integrated circuits) .
2. Description of the Prior Art
In virtue of the remarkable progress in semiconductor technology, fine processing technology and system technology, LSIs of such high integration level that could not be supposed an age ago have been realized. An electronic circuitry having as many as 30,000 gates can be mounted in an so small ceramic package as 2.8 cm.times.2.8 cm.times.0.7 cm. Thus, for example, it has become possible to mount an arithmetic processor capable of performing trigonometrical function calculation, or 16 megabit memory on a single chip.
With acceleration of integration to higher level however the evaluation and tests of LSI become more difficult because it is not avoidable to limit the number of connection terminals whereas a larger number of circuits for complex arithmetic function is enclosed at a higher density. In other words, measurement of signals appearing at external connection terminals usable to user, and nothing else, the evaluation and tests of a number of circuits described above are impossible. The procedure of observing the signal waveforms of desired sites in an LSI by a probe can be used before packaging of the LSI. It however not only cannot be used originally for tests of a product having been claimed by a user but also is becoming difficult to accomplish even before package as the internal interconnection becomes finer structure with higher level integration of LSI. In these circumstances test signal output means is essential which permits to monitor at external terminals the signal waveforms at specified sites in the LSI.
A test signal output circuit of this type in the prior art is provided, in addition to ordinary external connection terminals with a plurality of test signal output terminals, as unusable to the user, which are connected to specified sites in the LSI where the signal waveforms are needed to be observed. This construction is disadvantageous in the respect that a plurality of terminals for exclusive use in tests are needed, in addition to ordinary external connection terminals to be provided on the surface of the LSI, which not only brings an effect of lowering the integration level of the LSI but also requires increase in the number of terminals with to the number of test signals.
There is another test signal output circuit of this type in the prior art which is constructed so that in response to a test mode signal supplied at the test mode signal input terminal, the LSI is switched from normal operation mode to test mode, whereby ordinary external connection terminals can be used for test signal outputs only for the test mode periods.
This technique however has disadvantage that not only ordinary signals cannot be outputted for test mode periods but also the time required for mode switching becomes longer in some cases of test-mode signal construction.